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CD4052BM Electronic IC Chips CMOS Analog Multiplexers / Demultiplexers

Categories Electronic IC Chips
Brand Name: Anterwell
Model Number: CD4052BM
Certification: new & original
Place of Origin: original factory
MOQ: 10pcs
Price: Negotiate
Payment Terms: T/T, Western Union, Paypal
Supply Ability: 7700pcs
Delivery Time: 1 day
Packaging Details: Please contact me for details
DC Input Voltage: -0.5V to VDD +0.5V
DC Input Current, Any One Input: ±10mA
Operating Temperature: -55℃ to 125℃
Maximum Junction Temperature (Ceramic Package): 175℃
Maximum Junction Temperature (Plastic Package): 150℃
Maximum Storage Temperature: -65℃ to 150℃
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    CD4052BM Electronic IC Chips CMOS Analog Multiplexers / Demultiplexers


    CD4051B, CD4052B, CD4053B

    CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion

    Features

    • Wide Range of Digital and Analog Signal Levels

    - Digital . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 20V

    - Analog. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ≤20VP-P

    • Low ON Resistance, 125Ω (Typ) Over 15VP-P Signal Input Range for VDD-VEE = 18V

    • High OFF Resistance, Channel Leakage of ±100pA (Typ) at VDD-VEE = 18V


    • Logic-Level Conversion for Digital Addressing Signals of 3V to 20V (VDD-VSS = 3V to 20V) to Switch Analog Signals to 20VP-P (VDD-VEE = 20V)

    • Matched Switch Characteristics, rON = 5Ω (Typ) for VDD-VEE = 15V

    • Very Low Quiescent Power Dissipation Under All DigitalControl Input and Supply Conditions, 0.2µW (Typ) at VDD-VSS = VDD-VEE = 10V


    • Binary Address Decoding on Chip

    • 5V, 10V, and 15V Parametric Ratings

    • 100% Tested for Quiescent Current at 20V

    • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range, 100nA at 18V and 25℃

    • Break-Before-Make Switching Eliminates Channel Overlap


    Applications

    • Analog and Digital Multiplexing and Demultiplexing

    • A/D and D/A Conversion

    • Signal Gating


    CMOS Analog Multiplexers/Demultiplexers with Logic Level Conversion


    The CD4051B, CD4052B, and CD4053B analog multiplexers are digitally-controlled analog switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20VP-P can be achieved by digital signal amplitudes of 4.5V to 20V (if VDD-VSS = 3V, a VDD-VEE of up to 13V can be controlled; for VDD-VEE level differences above 13V, a VDD-VSS of at least 4.5V is required). For example, if VDD = +4.5V, VSS = 0V, and VEE = -13.5V, analog signals from -13.5V to +4.5V can be controlled by digital inputs of 0V to 5V.


    These multiplexer circuits dissipate extremely low quiescent power over the full VDD-VSS and VDD-VEE supply-voltage ranges, independent of the logic state of the control signals. When a logic “1” is present at the inhibit input terminal, all channels are off.


    The CD4051B is a single 8-Channel multiplexer having three binary control inputs, A, B, and C, and an inhibit input. The three binary signals select 1 of 8 channels to be turned on, and connect one of the 8 inputs to the output.


    The CD4052B is a differential 4-Channel multiplexer having two binary control inputs, A and B, and an inhibit input. The two binary input signals select 1 of 4 pairs of channels to be turned on and connect the analog inputs to the outputs.


    The CD4053B is a triple 2-Channel multiplexer having three separate digital control inputs, A, B, and C, and an inhibit input. Each control input selects one of a pair of channels which are connected in a single-pole, double-throw configuration.


    When these devices are used as demultiplexers, the “CHANNEL IN/OUT” terminals are the outputs and the “COMMON OUT/IN” terminals are the inputs.


    Absolute Maximum Ratings

    Supply Voltage (V+ to V-)

    Voltages Referenced to VSS Terminal . . . . . . . . . . . -0.5V to 20V

    DC Input Voltage Range . . . . . . . . . . . . . . . . . . -0.5V to VDD +0.5V

    DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . ±10mA


    Thermal Information

    Package Thermal Impedance, θJA (see Note 1):

    E (PDIP) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67℃/W

    M (SOIC) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73℃/W

    NS (SOP) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64℃/W

    PW (TSSOP) package . . . . . . . . . . . . . . . . . . . . . . . . . . 108℃/W


    Maximum Junction Temperature (Ceramic Package) . . . . . . . .175℃

    Maximum Junction Temperature (Plastic Package) . . . . . . . .150℃

    Maximum Storage Temperature Range. . . . . . . . . . -65℃ to 150℃

    Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 265℃

    (SOIC - Lead Tips Only)

    CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.


    NOTE: 1. The package thermal impedance is calculated in accordance with JESD 51-7.


    Pinouts



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